5 GHz CASCADED CMOS LNA WITH POSITIVE FEEDBACK FOR LOW POWER APPLICATION
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A novel circuit topology for a CMOS low-noise amplifier (LNA) is presented in this paper. By employing a positive feedback technique at the common-source transistor of the cascade stage, the voltage gain can be enhanced.Abstract
In addition, with the MOS transistors biased in the moderate inversion region, the proposed LNA circuit is well suited to operate at reduced power consumption and supply voltage conditions. Utilizing a standard CMOS process, the CMOS LNA has been demonstrated for 5-GHz frequency band applications. Operated at a supply voltage of 0.6 V, the LNA with the gain-boosting technique achieves a gain of 17 dB and a noise figure of 2.1dB. This CMOS LNA will be planned to work for military applications.
